A Circuit Model for the Charged Device Model Spark

Feature Article

Understanding Reactive Elements in the ESD Plasma

he JEDEC/ESDA charged device model (CDM) test standard JS-002 places a component in a metal/dielectric test fixture and uses a field-induced air discharge to test each pin of the component. Current waveforms depend on the circuitry under test, yet are fairly consistent for the small and large CDM verification targets, metal disks specified by JS-002. Those waveforms often fit a simple 2-pole RLC circuit model as shown in Figure 1, and as summarized in our 2014 paper [1].

Figure 1: Two-pole RLC model of CDM pulse

For these RLC fits to CDM waveforms, the R² (common statistical figure-of-merit) can fall far short of the ideal value of 1.0, sometimes as low as R² < 0.7 for large targets, representing a very poor fit. Clearly, something else is going on. Many workers have attempted to find clear trends in resistance R (presumed to be the spark resistance) but have not been able to do so. Field simulations of the CDM test fixture impedance have uncovered the expected skin effects, propagation delays, and high-frequency resonances. But, in the end, an L-C approximation holds out to several GHz. Thus, the calculated step response of the fixture and a metal target with constant R (presumably spark resistance) is close to a 2-pole RLC fit because the verification targets in the fixture have a principal resonant frequency of 1-2 GHz or less. The CDM spark itself is therefore thought to cause the observed deviations. Even when the agreement to RLC modeling is close (as can happen for the small target), the inductance L is higher than calculated for the probe and fixture (6-8 nH instead of 4-4.5 nH, for example).

Our recent EOS/ESD Symposium paper [2] discussed this history, including recent attempts to model waveforms with a variable spark resistance R(t), and our own contribution to that. Details and important references are in [2]. We became more comfortable with the idea of inductance built into the spark once we saw some 2021 work about agricultural sparks, which are much larger than semiconductor CDM sparks. In addition, a plot of (electric and magnetic) field energy vs. time for a typical CDM spark (see Figure 2) shows the expected collapse of field energy into the spark followed by a return of some energy to the field at around 1.5-2 nsec. There must be some kind of energy storage (i.e., a reactive element in the spark) for this to happen. The bump does not vanish for any reasonable values of L and C in the CDM test fixture.

Figure 2: Field energy, 1/2 CV2 + 1/2 LI2, vs. time for large CDM calibration target

Figure 2: Field energy, ½CV² + ½LI², vs. time for large CDM calibration target

The complex frequency s-domain current function for Figure 1 is:

where s =

+ jω, and the poles p_1,2 are such that:

where

and is commonly called the damping factor. The waveform will invert into the time domain (Heaviside inversion, in many math books) as a damped sinusoid (D<1), with a complex conjugate pole pair, or as a double exponential (D>1). Our usual case for CDM targets is D<1. But, as indicated above, the large target waveform does not fit the two-pole model of [1,2] very well beyond the first half cycle.

There are essentially two adjustable parameters in Equation 1, since the current can be integrated to give Q=CV₀, and C if V₀ is known. If only Q is known, the unitary solution (integral=1) is best expressed through variables ω₀ and D, as follows.

In order to get better fits to our waveforms, and to allow for more reactive circuit elements, we expanded the I(s) current function as simply as possible, by adding a real pole and a real zero:

Now the 2-pole complex conjugate section of the denominator is expressed with s and s² coefficients equivalent to RC and LC, respectively. We call this the three-pole, one-zero (3p1z) model. We now have four parameters, D, ω₀, τ₁, and τ₂, using the standard Heaviside expansion of Equation 3 into time-domain sin, cos, and exp functions, as shown in Equation 4. The fit is readily done in Excel using digital waveforms and Microsoft Solver in GRG (generalized reduced gradient) mode, searching for a least squares minimum, maximizing R². More detail is in [2], including how we corrected waveforms for slight cable and oscilloscope losses.

Heaviside expansion into the time domain of a three‑pole, one-zero (3p1z) model, such as Equation 3, takes the form:

where a=ω₀D, b=ω₀√(1-D²), and A, B, and C are constants driven by total charge CV₀ and on how τ₁ and τ₂ compare. If τ₁ = τ₂, only the two-pole term B survives. Otherwise, a partial fraction expansion of Equation 3 gives the two-pole term (damped sine), the derivative term (damped cosine), and an exponential term as in Equation 4. For our waveforms, we almost always observed τ₁ ≥ τ₂. This is expected if one decomposes Equation 3 into a 2-pole function modulated by a non-ideal step function, with the step function being:

This is a kind of rise time filter when τ₁>τ₂ and helps us understand why rise time filters have been useful for low-impedance contact CDM or LI-CCDM. This is discussed at some length in [2].

We found 3p1z solutions for several dozen waveforms, mostly from small and large CDM verification targets from my co-authors at Intel and Thermo Fisher. R² was at least 0.95 and usually well above, and the benefits of two more fitting parameters were clear. Details are in [2]. Next, we sought a one-to-one correspondence between a circuit model and the s-domain expression as in Equation 3. The problem with adding an extra inductor to the circuit in Figure 1 was that τ₂>τ₁ was not what we had observed. The key insight was to add an extra capacitor and to allow the extra inductance to be lumped in with the probe and fixture inductance. The new circuit is in Figure 3, with the CDM spark elements on the right-hand side, sharing inductance with the probe and fixture on the left. The 3p1z current function is as follows:

Figure 3: New 3p1z circuit for CDM discharge, with probe, fixture, and metal target on the left sharing inductance with air spark on the right. Total current as in Equation 6.

The cubic equation in the denominator is not easily factored to find the roots, but we found that, since we have all the coefficients from Equation 3, we wrote out a cubic equation solver in Excel (two complex conjugate roots and one real root for our waveforms) and, once again, used Solver to find an optimal fit. We have C from current integration to CV₀=Q, as always, so the four parameters from Equation 3 are fit to circuit elements R, Rx, Cx, and L, in most cases perfectly. If there is any doubt about the partitioning of C and V₀, it can be shown through Equation 6 that C can be chosen arbitrarily and then scaled by α, with αC paired with αCx, L/α, R/α, Rx/α, and V₀/α to give an identical solution. Also, it can be shown that the final inductance L, in Equation 6 and Figure 3, is equal to τ₁/τ₂ times the initial L as in Figure 1 and as would be extracted from Equation 3 (1/(ω₀²C)). This inflates the final inductance and can also be thought of as softening the voltage step function, as discussed in [2].

Examples

Figure 4 shows an example of a large CDM target 3p1z solution and circuit model. The inductor is about twice what we would expect from probe and test fixture, while the extra capacitance Cx almost matches the test fixture capacitance C. The current oscillates initially in the outer loop, where the LC product is about the same as for the test fixture, twice the L and half the C. The spark therefore absorbs the field energy quickly, through L-C matching, and conceals itself, as it were, by ringing at about the frequency expected from the L and C of the probe and target in the test fixture.

Figure 4: Circuit model and 3p1z parameters for large CDM target, +500V

Figure 5 shows more of the same for the small target (negative voltage waveform flipped for convenience). Inductance and capacitance “mirroring” in the spark occur again, this time for a much smaller C. Now the Rx in the outer loop is actually negative (not surprising for a plasma), while R=35 ohms bleeds off the spark energy. Despite the negative Rx, the poles and zero of Equation 6 are always in the left half of the complex plane, i.e., stable.

Figure 5: Circuit model and 3p1z parameters for small CDM target, -500V (waveform flipped)

One final case is shown in Figure 6, from the 2023 EOS/ESD Symposium paper 1A.5 [3], data kindly provided by the contributing author [4]. This target was small (1 cm²) and had a very small probe (inductance about 1 nH), therefore a smaller LC product than usual. Once again there was mirroring of external L and C in the spark itself, this time with negative Rx and even more vigorous high-frequency oscillations (about 3 GHz). This could mean that an air spark plasma resonance becomes more active at higher natural frequencies—if so, it is of strong interest to all CDM situations (factory test socketing, die-to-die (D2D) assembly, etc.) because of the low-inductance packages and interconnects of today.

Figure 6: Circuit model and 3p1z parameters for a small, low inductance probe (1 nH) target from a 2023 paper [3], +10V

The CDM test standard (now JS-002) originated in the 1980s when DIP packages justified the 5 mm probe still used in CDM test hardware. The test method has its merits and is not easy to change, but “real” CDM stress events may often have worst-case ringing and currents such as in Figure 6, so we should take note. Waveforms like Figure 6 have been observed at several labs and may represent worst-case CDM conditions.

Discussion and Summary

As the air spark plasma is composed of excited and ionized atoms and molecules, with lifetimes in the 10s of nanoseconds, plus free electrons, it is not surprising that energy-storage elements (extra inductance and, usually, capacitance) are part of the spark circuit model. Also, voltage is expected to precede plasma current flow, the I-V phase relation of an inductor. Remarkably, the spark’s extra L and C are usually a near-match for the L and C of the external environment, assuring a quick flow of energy into the spark from the field. The thermodynamics of this process could be interesting to study.

This initial work on the CDM spark circuit model should be continued on to larger and smaller target (i.e., package) sizes, and varying probe inductance so that the variety of CDM test and use conditions is comprehended. At some point, trends for all the circuit elements should be clear enough that the circuit model for any metal target (akin to a short circuit) in any CDM environment can be predicted, and with it trends for peak current and such. The model can then, for example, be used as a CDM “source,” surrounding a known ESD circuit model of a pin under test.

To facilitate the exploratory studies of these various CDM test conditions, the algorithm described here and in [2] could be ported to a software platform where the circuit parameters are found after very few keystrokes, as with existing ESD waveform evaluation software for human body model (HBM). Also, now that we have a circuit topology for the spark, we can imagine using a licensed version of SPICE simulator that finds optimized circuit element values given a topology. Having made fast work of the waveform evaluation, we can expect considerable physical insight to emerge from the trends discernable from large amounts of CDM data, much of which is already on file.

Finally, we should see if air spark plasma conditions produce the occasional high-frequency resonance (Figure 6) when certain external L-C conditions are met. This could represent a worst case for CDM peak current in factory assembly/test or D2D conditions. If the idea of an avalanche process and drift time of carriers to anode/cathode resonating with an external circuit sounds familiar to an electrical engineer, it could be because the decades-old high-power microwave IMPATT diode (impact ionization avalanche transit time) works on exactly that principle. We should find out if the occasional occurrence of such conditions is a threat to our devices in manufacturing and protect them accordingly.

References

T. Maloney and N. Jack, “CDM Tester Properties as Deduced from Waveforms,” IEEE TDMR-14, pp. 792-800. https://bit.ly/2VQlUfQ
T. Maloney, P. Ensaf, and M. Hernandez, “Intrinsic Inductance and Time-Dependent Resistance of the FI-CDM Spark,” 2024 EOS/ESD Symposium Proceedings, paper 2B.3, pp.93-102. Paper and slides at https://bit.ly/3WV9nod, slides presented at https://youtu.be/Oa5BQVCFBAo.
D. Johnsson, P. Tamminen, D. Oy, T. Viheriakoski, H. Gossner, “Discharge Waveforms of Emulated Die-to-Die ESD Discharges,” 2023 EOS/ESD Symposium Proceedings, paper 1A.5, pp. 47-55. https://doi.org/10.23919/EOS/ESD58195.2023.10287762
P. Tamminen, private communication.

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Timothy J. Maloney is a Fellow of the IEEE and the co-author of the book, Basic ESD and I/O Design (Wiley, 1998). Maloney spent much of his 40-plus year career as a Senior Principal Engineer at Intel Corporation and has made numerous presentations at the annual EOS/ESD Symposia and other IEEE conferences.

He can be reached at tjmaloney@sbcglobal.net.

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