Special Industry Update
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Industry Council Survey on Latch-up: A Brief Status Update
By Theo Smedes (NXP Semiconductors) for the Industry Council on ESD Target Levels
In July 2020, the Industry Council on ESD Target levels, in collaboration with the JEDEC JESD78 working group, launched a survey on Latch-up testing. An earlier article1 in this magazine described the reasons for launching the survey and invited representatives from the industry to participate in order to collect data and opinions. The survey is now closed, but a full pdf version of the survey2 is still available online. This article will give a short update on the results of the response analysis that is ongoing.

The Industry Council received 70 individual responses, from at least 35 companies from more than 16 countries. Multiple responses per company were encouraged because of the wide diversity of products, customers, and requirements. Although the survey was oriented at Revision E of the JESD78 standard, it is, of course, relevant to know which standards are actually used. The responses show that although other test standards and older JESD78 revisions are also used, the most prevalent standard in use is JESD78E. This gives good confidence in the relevance of the responses with respect to the survey’s goals.

A high-level analysis of the responses shows interesting observations and allows preliminary conclusions:

  • The responses give insight into the occurrence of Latch-up failures at different stages in the IC qualification process, application qualification process, and in the field. For example, answers to [Q06] show that the complaint rate for Latch-up based fails is low for most customers.
  • A topic of debate in the Latch-up community is the definition of Latch-up. Historically, Latch-up is associated with the presence of a parasitic thyristor. From responses to [Q47], it can be concluded that the majority considers that the definition should be much broader. A significant group of respondents agrees with the generic definition ‘anything that causes sustained current increase’.
  • Most respondents consider the Latch-up test method relevant, even with significance beyond the boundaries of the applied waveforms. Still, significant reservations to the usefulness are listed [Q09], and roughly 50% of the responses indicate that JESD78 alone is insufficient [Q49], [Q50].
  • There is considerable disagreement on what should and should not be considered a Latch-up failure, but only 5% of the responses stated that the current (JESD78E) criteria were sufficient.
  • The responses on questions related to Maximum Stress Voltage (MSV) and Absolute Maximum Rating (AMR), clearly suggest that in practice these are often equated. Since that is not the intent of the method, this feedback indicates that a better explanation is needed, possibly accompanied by additional education using webinars or tutorials.

All in all the survey results indicate that there is a need to improve the definition and understanding of the Latch-up test standard, as well as a need to cover broader ranges of applications. The full analysis of all responses is in progress and will be incorporated into a report that has recently been started. A more detailed analysis and summary will be presented at the 2021 EOS/ESD Symposium in September. This will be followed by the full report published by the Industry Council and JEDEC.

More information on the Industry Council on ESD Target Levels can be found here: http://www.esdindustrycouncil.org/ic/en.

  1. “Industry Council Launches Survey on Latch-Up,” In Compliance Magazine, July 2020, pp. 20-21
  2. Full link to the survey: https://www.esdindustrycouncil.org/ic/docs/latchupsurvey2020.pdf
  3. [Qxy] indicates question xy in the survey document that can be found via the link mentioned in the text
Theo Smedes headshot
Theo Smedes began work in ESD in 2000 and currently is Fellow for ESD, Latch-up, and EOS within NXP Semiconductors. He published several papers on ESD and introduced an ESD design course within NXP. Theo is a member of all ESDA device testing working groups and is chair of the TLP working group. He has been a member of the Industry Council on ESD Target Levels since it was founded in 2006.