hot topics in ESD
Industry Council’s
Latch‑up Survey
I

n July 2020, the Industry Council on ESD Target levels, in collaboration with the JEDEC JESD78 working group, launched a survey on latch-up testing. As described in an earlier article [1] in this magazine, the survey was conducted to better understand how the present latch-up standard (JESD78 revision E) is interpreted and used in the industry. The article also invited representatives from the industry to participate in order to collect data and opinions. The survey is closed, but a pdf version is still available at https://www.esdindustrycouncil.org/ic/docs/latchupsurvey2020.pdf.

This article provides a high-level overview of the Industry Council paper “Survey on Latch-up Testing Practices and Recommendations for Improvements,” which describes the full analysis of the collected responses and lays a path for potential adaptations needed to accommodate its use in future technologies and applications. Based on the survey results, we summarize the key issues documented in the paper that include problems with the latch-up standard and its application. Based on that analysis, the compiled results suggest improvements for better understanding and future JESD78 related testing. This article serves explicitly as an invitation to read the published paper, which is freely available from the Industry Council website [2] and will also become available via the JEDEC website [3].

continental map showing the global distribution of responses
Figure 1: Global distribution of responses. The size of the dots is an indication for the number of responses from a country.
Latch‑up Survey and Analysis Process

The Industry Council received 70 individual responses from at least 35 companies from more than 16 countries. The distribution over the globe is illustrated in Figure 1. Multiple responses per company were encouraged because of the wide diversity of products, customers, and requirements. This makes it likely that different approaches to latch-up testing may be used even within one company.

Based on questions with respect to market space, business type, and applications, we can conclude that the respondents cover the industry well. Notable exceptions are OEMs using analog ICs. Although the survey was oriented at Revision E of the JESD78 standard, it is relevant to know which standards are actually used. Figure 2 shows that although other test standards and older JESD78 revisions are also used, the most prevalent standard in use is JESD78E. This gives good confidence in the relevance of the responses with respect to the survey’s goals.

Pareto of Latch-up standards being used as reported by the respondents
Figure 2: Pareto of Latch-up standards being used as reported by the respondents
The survey was divided into nine sections, each addressing sub-topics like Field Returns, Test Execution, Failure Criteria, etc. More details on the structure of the survey are provided in Chapter 1 of the paper. The survey was set up to answer high-level questions such as:
  • How is the test standard interpreted and executed across the industry?
  • Which real-life events does JESD78 intend to simulate? Do these occur in present-day applications?
  • The prescribed voltage compliance limits prevent any significant current injection for low voltage pins. Is that intended and/or desired?
  • Do we have evidence that the test method is a good predictor of robustness against latch-up in the field?
  • What changes should be made to the standard to better suit the reality of present-day and future technologies and products?
  • How is the test standard interpreted and executed across the industry?
  • Which real-life events does JESD78 intend to simulate? Do these occur in present-day applications?
  • The prescribed voltage compliance limits prevent any significant current injection for low voltage pins. Is that intended and/or desired?
  • Do we have evidence that the test method is a good predictor of robustness against latch-up in the field?
  • What changes should be made to the standard to better suit the reality of present-day and future technologies and products?

Chapter 2 of the paper describes the detailed analysis of the responses in relation to the questions mentioned above. An effort was made to address topics in the same sequence as the questions appeared in the survey. The analysis is meant to strictly report and summarize the respondents’ information and find potential correlations between different topics. However, whenever the analysis team felt it was appropriate to offer a “possible interpretation,” it was indicated using a special box format with the disclaimer that other interpretations would be possible.

Conclusions and Recommendations

The conclusions and recommendations are provided in Chapter 3 of the paper. Some of the key results are summarized below. To fully understand the survey results, it is strongly recommended to read the full report.

One of the most relevant questions is if JESD78 latch-up testing ensures the robustness of products in the field. Related key findings are:

  • JESD78 is considered useful and should not be removed.
  • It is evident that passing JESD78 testing is insufficient to guarantee latch-up robustness in the field, as shown in Figure 3, and seems to be more related to the type of stress rather than the levels.
  • Respondents see value in JESD78 testing for modeling real-world stress events beyond the specified test conditions.
  • JESD78 is considered useful and should not be removed.
  • It is evident that passing JESD78 testing is insufficient to guarantee latch-up robustness in the field, as shown in Figure 3, and seems to be more related to the type of stress rather than the levels.
  • Respondents see value in JESD78 testing for modeling real-world stress events beyond the specified test conditions.
pie Chart of [Q41]
Figure 3: Pie Chart of [Q41], “Does passing JESD78 testing guarantee latch-up robustness in the field?”respondents
Feedback to [Q12]
Figure 4: Feedback to [Q12], “Where have you experienced latch-up failures?” in the Case where [Q11], “Have you experienced latch-up failures?” Was Answered “Yes”
pareto of [Q21]
Figure 5: Pareto of [Q21], “What percentage of your company’s product re-spins were due to latch-up failures in a system application?”
Another major topic is the assessment of how large the latch-up problem is in practice. Examples of findings related to this are:
  • Figure 4 shows the majority of latch-up fails are reported during the JESD78 qualification test, and many of these fails result in a re-spin, but this accounts for a very small fraction of the total number of re-spins as shown in Figure 5.
  • More than 50% of all latch-up failures (field + JESD78 testing) do not require a re-spin, but the failure drives alternative mitigations such as board modifications or software changes
  • Figure 4 shows the majority of latch-up fails are reported during the JESD78 qualification test, and many of these fails result in a re-spin, but this accounts for a very small fraction of the total number of re-spins as shown in Figure 5.
  • More than 50% of all latch-up failures (field + JESD78 testing) do not require a re-spin, but the failure drives alternative mitigations such as board modifications or software changes
Figure 4 shows at what step latch-up was detected, Figure 6 shows the root causes, and Figure 5 shows how often such cases led to re-spins.

The last highlighted topic is the question if the standard is sufficiently clear. It appears that some concepts in the standard are not interpreted the same way by all users and sometimes are even used incorrectly. The most important example is:

  • The concept of the “Maximum Stress Voltage” is well-known in the industry but very often misinterpreted or incorrectly applied to JESD78 testing
  • Many respondents believe that the pin stress voltage should not exceed the product AMR, see Figure 7
  • The concept of the “Maximum Stress Voltage” is well-known in the industry but very often misinterpreted or incorrectly applied to JESD78 testing
  • Many respondents believe that the pin stress voltage should not exceed the product AMR, see Figure 7
Key recommendations for possible improvements and extensions of JESD78E are listed below. Some may reach beyond the JESD78 specification – they may appeal to other industry bodies, symposia, trainers, vendors, etc. Section 3.2 of the paper gives a more comprehensive list of recommendations.
  • Create a JESD78 user guide with practical explanations, hints, and examples.
  • Provide seminars and workshops aligned with the latest JESD78 revision F release, discussing the major changes from JESD78 revision E and its implications to LU testing.
  • Consider ways to standardize LU testing at the application level (System Level ESD, Transient LU).
  • Create a JESD78 user guide with practical explanations, hints, and examples.
  • Provide seminars and workshops aligned with the latest JESD78 revision F release, discussing the major changes from JESD78 revision E and its implications to LU testing.
  • Consider ways to standardize LU testing at the application level (System Level ESD, Transient LU).
Distribution of Responses for [Q20]
Figure 6: Distribution of Responses for [Q20], “For products that have had latch-up failures in the system, but had passed JESD78 testing, what was the root cause?”
Pie Chart of Responses to [Q90]
Figure 7: Pie Chart of Responses to [Q90], “Do you set the pin stress voltage limits so that they do not exceed the product AMR?”
Outlook

During the development of this survey and paper, the JEDEC JESD78 working group prepared and released a next revision of the JESD78 standard. Chapter 3, Section 3.3 concludes the paper with a summary of the major differences between JESD78 revision E and JESD78 revision F and relates this to the recommendations provided.

Overall, the survey results indicate a dire need to improve the definition and understanding of the latch-up test standard and cover a broader range of applications. The Industry Council releases this paper to help focus the work to accomplish that.

References
  1. “Industry Council Launches Survey on Latch-Up,” In Compliance Magazine, July 2020, pp. 20-21.
  2. Website Industry Council on ESD Target Levels: https://www.esdindustrycouncil.org/ic/en
  3. Website JEDEC: https://www.jedec.org
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Theo Smedes began work in ESD in 2000 and currently is Fellow for ESD, Latch-up and EOS within NXP Semiconductors. He published several papers on ESD and introduced an ESD design course within NXP. Theo is member of all ESDA device testing working groups and is chair of the TLP working group. He has been a member of the Industry Council on ESD Target Levels since it was founded in 2006.
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Founded in 1982, EOS/ESD Association, Inc. is a not for profit, professional organization, dedicated to education and furthering the technology Electrostatic Discharge (ESD) control and prevention. EOS/ESD Association, Inc. sponsors educational programs, develops ESD control and measurement standards, holds international technical symposiums, workshops, tutorials, and foster the exchange of technical information among its members and others.