According to a Notice of Apparent Liability for Forfeiture, the companies, Q Link Wireless LLC, and Hello Mobile Telecom LLC, routinely relied on…

ith the inventions of the transistor in 1947 and the integrated circuit in 1958, and the utilization of these major solid-state breakthroughs in the development of computers and other electronic devices, industry began to worry about designing components and end-products that could survive the impact of electrostatic discharges to chips, printed circuit boards, and final packaged-products. The 1960s and 1970s saw individual companies developing their own ESD test values and laboratory test techniques. The International Electrotechnical Commission (IEC), which is closely related to the International Standards Organization (ISO), got involved in the 1980s with the release of IEC 801-2 in 1984 on ESD limits and susceptibility test methods. Since the late 1980s, most electronic companies test their end-products for ESD immunity in accordance with the specifications found in IEC 801-2 and its follow-on standard, IEC 61000-4-2.

Editor’s Note: The paper on which this article is based was originally presented at the 43^rd Annual EOS/ESD Symposium in October 2021. It was subsequently awarded the 2021 Symposium Outstanding Paper at the 44^th Annual EOS/ESD Symposium in September 2022. It is reprinted here with the gracious permission of the EOS/ESD Association, Inc.

The automotive industry is experiencing a revolutionary transformation towards electrification, autonomous driving, as well as more connectivity and information. Thus, in-vehicle-network architecture is changing with an exploding amount of data cars need to process at high-speed. For example, infotainment content is rapidly increasing with an average of 20 cameras and 15 displays per vehicle. In addition, the new zonal architecture requires a new IP based protocol. Here, the automotive ethernet plays a key role for the links with data rates up to 1 Gbit/s today and multi-Gbit/s in the future. The so-called Open Alliance Committee defines a standard for those links in EHTERNET 100/1000BASE-T1, especially for the ESD protection device [1].

he last three EOS/ESD Symposiums were offered in a hybrid format for presenters and attendees – facilitating virtual connection for those strongly impacted by pandemic-related travel restrictions. In 2022, more than 200 attendees and 36 exhibiting companies traveled to the Peppermill in Reno, NV, USA, and only 50 attendees participated virtually. The shift of attendees attending virtually in 2020 and 2021 to in-person in 2022 demonstrates the value and importance of face-to-face events and activities.

After considering many variables influencing a decision to host face-to-face-only events, the EOS/ESD Symposium will be on-site with no livestream connection in 2023. This decision means the Symposium strategy team can explore new ways to increase the interactivity that attendees truly value – the face-to-face and networking opportunities provided by an in-person event.

These opportunities include enhancing already established interactive sessions, such as workshops and hands-on demonstrations, and adding new initiatives. One focus is revamping the format of workshops with a task team already evaluating innovative solutions, such as interactive polling, a panel of invited speakers, and a new standalone session on the upcoming revision to the EOS/ESD Association, Inc. Technology Roadmap. We are introducing a new interactive session with members of the Association’s standards working group activities and a new exciting electronic format for the Author’s Corner posters. Other exciting ideas include expanding the exhibit hall offerings with introductory tours to meet the exhibitors and demonstrations by exhibitors in their booths.

We appreciate your understanding and trust that EOS/ESD Association, Inc. has carefully considered the many impacts of hosting an in-person-only Symposium in 2023. With your support, EOS/ESD Symposium will continue to be the premier industry event. The 2023 Symposium Strategy and Steering Teams are excited about what’s to come, and we hope you are as well!

We look forward to seeing you in person at the 2023 EOS/ESD Symposium at the Riverside Convention Center in Riverside, CA, USA

his is the third part of our article “(Re)Discovering the Lost Science of Near Field Measurements.” Part 1 of this article (see In Compliance Magazine, July 2023) explained what near and far field measurements entail, and that one-meter measurements are very much near field. Part 2 (In Compliance Magazine, August 2023) explained the evolution of the earlier 12” and present-day one-meter separation measurements, considerations in antenna selection, the difference between antenna-induced and field strength limits, and the evolution from one to the other. This third part investigates practical problems arising from the misapplication of field intensity and far-field concepts to near-field phenomena.

This brief, lightly mathematical treatment demonstrates the true nature of the quasi-static electric and magnetic fields in the immediate vicinity of an excited dipole. The results are quite different than those presented in electromagnetics texts and electromagnetic compatibility handbooks.

his is the second article of a two-article series devoted to the return current distribution in a PCB microstrip line configuration. The previous article [1] presented the CST simulation results in the case of a solid reference plane. This article addresses the case where the reference plane contains several discontinuities: edge slot, internal slot, slot holes, and via cutouts.

The results showed that at 10 Hz the return current spreads wide over the reference plane, flowing both under the top trace and directly from the load port to the source port. As the frequency increases to 100 Hz, more of the return current flows under the trace (with a narrower spread), and less of it flows directly from the load port to the source port. This trend continues as the frequency increases to 1 kHz. As the frequency increases beyond 10kHz, the return current path remains virtually unchanged, predominantly flowing beneath the forward trace. In other words, the return current path and current density no longer depend on frequency.

n Part 1 of the article, we reviewed what EDA tools are good for. Here we will discuss EDA tool limitations.

A complete ESD solution is never made by EDA tools alone. Certain ESD design aspects are so specific for a product that it does not pay to make an EDA code for it (although it could fundamentally be done).

ESD is a complex phenomenon and ESD design verification involves checking a wide range of initial conditions and requirements (e.g., available area, stress tests validations conditions, single or cumulative stresses, special bonding or package conditions, external metallization levels, etc.). These require special inputs and appropriate initializations in EDA tools which often prevents ESD EDA from being a push-button solution. ESD protection strategies vary, and an EDA tool cannot always establish a priori the best strategy out of several existing ones.