Boeing 737 Engine Covers May Be Susceptible to EMFs

Inspections of the engine coverings will be required before the aircraft are cleared to fly

Safety officials at the U.S. Federal Aviation Administration (FAA) will require that airline manufacturer Boeing conduct inspections of engine coverings of its 737 MAX aircraft due to their potential vulnerability to electromagnetic fields (EMFs).

According to reported posted to the Brinkwire website, inspections of the engine coverings, also known as nacelles, will be required prior to the FAA providing Boeing with clearance to fly the 737 MAX aircraft. While the company successfully argued that the coverings provided a sufficient defense against lighting strikes, the FAA believes that “strong electromagnetic fields could cause a loss of power or faulty readings in the cockpit because of inadequate shielding around wiring.”

DILBERT © 2020 Scott Adams. Used By permission of ANDREWS MCMEEL SYNDICATION. All rights reserved.

Principles of Switched-Mode Power Supply Design for EMC Performance

By Bogdan Adamczyk

his article discusses the basics of a step-down (buck) DC Switched-Mode Power Supply (SMPS). It should serve at an entry-level tutorial and a building step towards the more advanced designs.

Basic SMPS Topology

The main functional objective of the buck SMPS is to step down a DC signal, V_IN, to a lower DC value, V_OUT, as shown in Figure 1.

The first step in this process consists of creating a Pulse-Width Modulated (PWM) version of the DC input signal, as shown in Figure 2.

The output signal shown in Figure 2 is far from the desired output signal described in our objective. Namely: 1) it is a constant signal only when the transistor is ON, 2) its level, when the transistor is ON, is not lower than the input signal, and 3) it contains high harmonic content during the transition times, [1].

Even Optical Communication Needs ESD Protection

By Bart Keppens for EOS/ESD Association, Inc.

n the past, fiber-optic communication was used primarily for long-distance communication (50 km and beyond). Only a limited number of these high-end interface products were required worldwide. More recently, companies running large data centers (Facebook, Google, Amazon) have been replacing the traditional copper cabling between server racks (Figure 1). The copper-based approach is considered a bottleneck for further improvements in data transfer capacity. Optical communication can dramatically increase the bandwidth between servers while reducing complexity, power consumption, and cost.

Reducing Cost and Power while Increasing Bandwidth

Thus, the optical interconnect suppliers now need to produce a large number of their products. To reduce the cost, they separate the optical parts (laser diodes, photodetectors) from the digital controller circuits. For the electrical ICs, regular CMOS technology can be used for mass-production. Moreover, there were several technological breakthroughs in the last decade, where conventional CMOS processing steps facilitate the creation of several different optical components like WDM (Wavelength Division Multiplexers), lasers, detectors, waveguides in, e.g., SOI processes.

Device Failure from the Initial Current Step of a CDM Discharge

By David Johnsson, Krzysztof Domanski and Harald Gossner

Editor’s Note: The paper on which this article is based was originally presented at the 40^th Annual EOS/ESD Symposium, where it was awarded the Symposium Outstanding Paper in 2019. It is reprinted here with the gracious permission of the EOS/ESD Association, Inc.

Introduction

RF interfaces tend to get more sensitive as the gate oxide (GOX) thickness is continuously decreasing for every new technology node. At the same time, the high operating frequencies limit the capacitive budget for Electro Static Discharge (ESD) protection devices. This makes the ESD design challenging, especially for the Charged Device Model (CDM) pulse with its high current and fast rise time. In this work the CDM failures of a sensitive RF interface are investigated. By modifying a CDM tester it is proven that the failures are related to the fast current step that appears at the beginning of a CDM event. The analysis is supported by 3D electrical field simulation of a CDM tester, showing that the first current step can have a rise time in the order of 20 ps. It is shown that the failure can be reproduced by applying CC-TLP pulses with 20 ps rise time. By investigations of rise-time sensitive test structures on wafer, it is demonstrated how the wiring layout can strongly influence the failure level in this fast pulse regime.

Why You Should Pay Attention to Cable Discharge Events (CDE)

CDE, the Re-Discovered Barrier in the ESD Landscape?

By Mart Coenen

able discharge events (CDE) occur when a cable is plugged into an electrical system and when the cable and the system are at different potentials. CDE can cause system failures such as system lock up, requiring a reboot, and even physical damage.

There have been numerous technical papers on the subject, and ESDA Working Group 14, System Level ESD, has been considering the development of a test standard to screen for this issue for some time. The problem is that there is no single “worst-case” event that is CDE. There are many types and qualities of cable, multiple ways that cables and system can get to different potentials before being connected, and the far end of the cable may or may not be connected to another electrical system or device.

In this article we will review our current understanding of some of the issues with CDE. At the same time, we welcome your help in developing a CDE test method (or methods) to address the issues you have encountered. Please contact us to share your own experiences with CDE, and the real-world problems you believe we need to consider in this process.

Why Resistance Requirements Differ by Industry and Why Standards Matter

By David Long

n access floor contractor was bidding a project calling for “static dissipative” flooring. Like many contractors, the project manager viewed the terminology from a generic perspective. Most laymen equate the term static dissipative (SD) with any flooring type that is marketed for the purposes of mitigating the discharge of static electricity. They do not realize there is a distinction between a conductive floor and a dissipative floor and that there may be a practical reason for choosing one over the other.

Since the architectural specs did not include electrical resistance parameters, cite-specific industry standards, or require that resistive properties be tested before final acceptance, the project manager felt comfortable bidding any type of ESD flooring. In this instance, she proposed a conductive floor for an FAA flight tower, when in fact the FAA requires flooring to measure in the static-dissipative range.

How and Why Varistor Failure Occurs Including the Effect of Multipulse Surges

The Story of the Varistor and the Often-Unappreciated Ways It Can Fail

By Albert R. Martin

Varistor Basics

In order to understand failure, it’s useful to discuss how varistors are made. In this regard, there are three things of note.

First, varistors are a ceramic material composed primarily of zinc oxide (ZnO). At ambient conditions, ZnO crystallizes into a hexagonal wurtzite structure, as shown in Figure 1, where the large balls represent Zn and the small balls represent oxygen (O). This is a complicated structure that, if it crystallized perfectly, would be an insulator. But because the crystallization process isn’t perfect, the resulting oxygen vacancies or zinc interstitials cause this structure to become a wide-gap semiconductor having a relatively low resistivity of 1 – 100 Ω-cm at room temperature.

Second, a varistor is not one uniform wurtzite crystal, but many which coalesce into grains. To make ZnO into a varistor, a small amount of Bi₂O₃ is added. The Bi₂O₃ goes into the grain boundaries, as shown in Figure 2. In addition to Bi₂O₃, MnO may be added to enhance the nonlinear properties; Sb2O3 to control the ZnO grain growth; and a small amount of Al₂O₃ to increase the ZnO grain conductivity.

The Bi₂O₃ between two ZnO grains results in the formation of back-back Schottky diodes. So essentially, a varistor is a series-parallel arrangement of n-type material separated by back-back Schottky diodes having a voltage drop of about 2V-3V per grain boundary Junction (independent of grain size). According to He [1], this structure can be characterized electrically by Equation (1).

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42^nd Annual EOS/ESD Symposium – A Brand New Hybrid Event Experience!

The EOS/ESD Symposium represents the world’s leading forum on electrostatic discharge and electrical overstress. This year, we are thrilled to invite you to experience our brand new hybrid event. With our hybrid event, you can attend the Symposium face-to-face and we are following the most advanced safety precautions available. You may also experience the Symposium in real-time via livestream or enjoy On-Demand access after the live event concludes from the comfort of your home or office. The choice is yours!

Since 1979, industry professionals from all over the world have flocked to the EOS/ESD Symposium to enjoy the unique opportunity to meet professionals with hands-on experience in their fields as well as learn from and exchange knowledge with the greatest industry experts of our time. This is an exciting time, and we are committed to bringing you a one-of-a-kind hybrid event that sets the bar high, pioneering a new vision for our events, and setting a path for others to follow.

We are proud to offer you 3 tracks over 5 days of tutorials and technical presentations. These will feature different delivery mechanisms and will involve ways for you to engage presenters virtually if they or you are present at the face-to-face event! Instructors and presenters will be live at the event, some will be presenting from their home base via livestream broadcasting to the event site, and some will provide a pre-recorded presentation and join us for Q&A sessions. We also welcome you to enjoy industry exhibits from exhibitors showcasing a wide variety of ESD solutions from established products to leading-edge innovations, on-site and also through virtual exhibits.

On top of these incredible offerings, we are also pleased to present this year’s Keynote “The Role of Photons in Hardware Security” by Dr. Shahin Tajik of the Florida Institute for Cybersecurity (FICS) Research at the University of Florida who is joining us via livestream.